In the pending International patent application No. PCT/SE2005/00686, “Synchronization of VoDSL for DSLAM Connected Only to Ethernet”, filed May 11, 2005, inventor Tore André, a method and a device for synchronizing POTS (Plain Old Telephony Service) over packet networks are described, this previous patent application being incorporated by reference herein.
Generally, when packets are used for transporting information representing voice, a clock signal may be required, such as a sampling clock, when receiving the packets in order to be capable of forwarding the voice information in another medium. The clock signal should be related to the original clocking signal used in converting original voice information to a digital form and it may be used for converting the voice information carried in the packets to e.g. another digital form, such as a continuous bit stream, or to an analog signal. For example, in a mobile telephony network the base stations may receive voice information from a packet network, such as an Ethernet network, and then a packet clock signal may be regenerated in the base stations to be used to create clock signals for transmitting information from the base stations.
A telephone network including a packet transport network is schematically illustrated in FIG. 1 in which voice information is communicated through an Ethernet network. A telephone set 1 is through an Ethernet interface 3 connected through an Ethernet network symbolically illustrated by the Ethernet switch 5 to the PSTN (Public Switched Telephone Network) 7. The PSTN is connected to the Ethernet network at a local exchange/switch 9 and a TAG (Telephony Access Gateway) 11. The TAG places the voice samples in Ethernet frames and retrieves voice samples from received Ethernet frames.
The Ethernet interface 3 is connected to the Ethernet network at a network port 13. The interface includes a plurality of line circuits 15, each connected to an individual subscriber line 17. The Ethernet interface includes access equipment 19 that includes a module 21 for handling packets received from and transmitted into the Ethernet and a module 23 for handling calls, in particular for establishing and terminating calls and possibly for accounting.
Furthermore, the Ethernet interface 3 includes a clock device 25 taking information about incoming packets, such as from the network port 13, for generating a common clock signal distributed to the line circuits 15. Ethernet frames of a single stream arriving to the Ethernet interface can in an ideal case be supposed to arrive at equal distances in time. However, due to delay variation in the transport network random delays are added to the expected arrival times. Such random delays can be considered as a noise source in a timing recovery system, see FIG. 2. The noise is always positive but still a trend can be estimated, see the diagram of FIG. 3. The sloping line denoted by “Trend due to wrong clock” of FIG. 3 indicates in the case shown that the reference clock signal used has a little too high a frequency. The line should in the ideal case coincide with or be parallel to the abscissa axis of the diagram.
The clock device 25 can use, as described in the cited International patent application, an algorithm based on finding the smallest value within a time window of arrival times of received packets. This method is efficient if the distribution of delay values has a steep slope and a lot of packets arrive with delays close to a minimum delay, minx, see the diagram of FIG. 4.
In some cases, for e.g. a transport network having a high load, the majority of packets can be delayed more than the minimum delay, see the diagrams of FIGS. 5a and 5b. In those cases an algorithm using only the smallest values is not the best method since the packages arriving with very low delays are too rare.